Coplanar Full Adder in Quantum-Dot Cellular Automata via Clock-Zone Based Crossover - 2016


We use a coplanar QCA crossover design in the design of QCA full adders that results in reduction of QCA cell count and area consumption while not any latency penalty. This crossover uses non-adjacent clock zones for the two crossing wires. We have a tendency to further investigate the impact of those gains on carry flow QCA adders. These designs are realized with QCADesigner, evaluated, and tested for correctness. For better performance comparison with previous relevant works, we tend to use a QCA-specific cost operate, along with the traditional analysis method. We tend to show twenty three% cell count and forty eight% area enhancements over the best previous QCA full adder style. Similar results for 4-, eight-, 16-, 32-, and 64-bit adders are twenty ninep.c (22percent), twenty fourp.c (51percent), 19% (54%), 13percent (sixty ninepercent), and nine% (forty nine%) cell count reduction (less area consumption), respectively.

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