Design Method of Single-Flux-Quantum Logic Circuits Using Dynamically Reconfigurable Logic Gates - 2015
In this study, we tend to designed and tested dynamically reconfigurable AND/OR and NAND/NOR single flux quantum (SFQ) logic gates. The measured dc bias margins at low frequency were 99p.c-126% and 121%-fourteenfour% for AND/OR and NAND/NOR gates, respectively. The experimentally confirmed most operating frequencies of the AND/OR and NAND/NOR gates were thirty six and 24 GHz, respectively. We investigated a circuit style methodology that allows the economical design of SFQ logic circuits by using dynamically reconfigurable SFQ logic gates. The logic circuits were designed with a small range of gates using the input information pattern dependence of the Boolean perform and reconfiguring the dynamically reconfigurable SFQ logic gates. As a case study, we designed and tested a small amount-serial SFQ full adder using the investigated circuit design method. Compared with the conventional bit-serial SFQ full adder, the delay of the proposed full adder was reduced by twenty sevenpercent, assuming a clock frequency of twenty GHz. We confirmed correct operation of the adder with a coffee-speed check.
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