Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications - 2015


The want to support various digital signal processing (DSP) and classification applications on energy-constrained devices has steadily grown. Such applications typically extensively perform matrix multiplications using fixed-point arithmetic while exhibiting tolerance for a few computational errors. Hence, improving the energy efficiency of multiplications is essential. During this transient, we have a tendency to propose multiplier architectures which will tradeoff computational accuracy with energy consumption at design time. Compared with a precise multiplier, the proposed multiplier will consume fifty eight% less energy/op with average computational error of ~one p.c. Finally, we tend to demonstrate that such a little computational error does not notably impact the quality of DSP and the accuracy of classification applications.

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