This paper presents an architecture of the lifting-based running 3-D discrete wavelet transform (DWT), which is a powerful image and video compression algorithm. The proposed design is one of the first lifting based complete3-D-DWT architectures without group of pictures restriction. The new computing technique based on analysis of lifting signal flow graph minimizes the storage requirement. This architecture enjoys reduced memory referencing and related low power consumption, low latency, and high throughput compared to those of earlier reported works. The proposed architecture has been successfully implemented on Xilinx Virtex-IV series field-programmable gate array, offering a speed of 321 MHz, making it suitable for real-time compression even with large frame dimensions. Moreover, the architecture is fully scalable beyond the present coherent Daubechies filterbank (9, 7).

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

PROJECT TITLE :Efficient Secure Outsourcing of Large-Scale Sparse Linear Systems of Equations - 2018ABSTRACT:Solving large-scale sparse linear systems of equations (SLSEs) is one in all the foremost common and basic problems in
PROJECT TITLE :Distributed Feature Selection for Efficient Economic Big Data Analysis - 2018ABSTRACT:With the rapidly increasing popularity of economic activities, a large amount of economic data is being collected. Although
PROJECT TITLE :Efficient Wideband DOA Estimation Through Function Evaluation Techniques - 2018ABSTRACT:This Project presents an economical analysis methodology for the functions involved within the computation of direction-of-arrival
PROJECT TITLE :Efficient System Tracking With Decomposable Graph-Structured Inputs and Application to Adaptive Equalization With Cyclostationary Inputs - 2018ABSTRACT:This Project introduces the graph-structured recursive least
PROJECT TITLE :Efficient Partial-Sum Network Architectures for List Successive-Cancellation Decoding of Polar Codes - 2018ABSTRACT:List successive cancellation decoder (LSCD) architectures have been recently proposed for the decoding

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry