Fault Prognosis for Power Electronics Systems Using Adaptive Parameter Identification - 2017


This paper presents the look, implementation, and experimental validation of a method for fault prognosis for power electronics systems using an adaptive parameter identification approach. The adaptive parameter identifier uses a generalized gradient descent algorithm to compute real-time estimates of system parameters (e.g., capacitance, inductance, parasitic resistance) in arbitrary switching power electronics systems. These estimates can be used to observe the health of a power electronics system and to predict when faults are a lot of doubtless to occur. Moreover, the estimates will be used to tune management loops that rely on the system parameter values. The parameter identification algorithm is general in that it will be applied to a broad class of systems primarily based on switching power converters. We tend to present a real-time experimental validation of the proposed fault prognosis method on a three kW solar photovoltaic interleaved boost dc-dc converter system for tracking changes in passive element values. The proposed fault prognosis technique permits a flexible and scalable answer for condition monitoring and fault prediction in power electronics systems.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

PROJECT TITLE :Enhancing Fault Tolerance and Resource Utilization in Unidirectional Quorum-Based Cycle Routing - 2018ABSTRACT:Cycle-based optical network routing, whether or not using synchronous optical networking rings or p-cycles,
PROJECT TITLE :Faultprog: Testing the Accuracy of Binary-Level Software Fault Injection - 2018ABSTRACT:Off-The-Shelf (OTS) software parts are the cornerstone of contemporary systems, as well as safety-important ones. However,
PROJECT TITLE :Symbolic Synthesis of Timed Models with Strict 2-Phase Fault Recovery - 2018ABSTRACT:In this article, we tend to concentrate on economical synthesis of fault-tolerant timed models from their fault-intolerant version.
PROJECT TITLE :Fault Space Transformation: A Generic Approach to Counter Differential Fault Analysis and Differential Fault Intensity Analysis on AES-like Block Ciphers - 2017ABSTRACT:Classical fault attacks, like differential
PROJECT TITLE :Fault Tolerant Logic Cell FPGA - 2017ABSTRACT:It is proposed fault tolerant logic cell - LUT FPGA consistent with concept of the functionally complete tolerant element (FCT). The FCT component (logic element with

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry