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  3. IEEE MTECH VLSI ( VHDL/VERILOG ) PROJECTS
  4. A novel realization of reversible LFSR for its application in cryptography - 2015
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Category: MTECH VLSI ( VHDL/VERILOG ) PROJECTS
By MTech Projects
MTech Projects
27.Mar
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A novel realization of reversible LFSR for its application in cryptography - 2015

PROJECT TITLE:

A novel realization of reversible LFSR for its application in cryptography - 2015

ABSTRACT:

One-to-one mapping from input to output is the necessary condition for a reversible computational model transiting from one state of abstract machine to another. Probably, the most important motivation to review reversible technologies is that, it's thought-about to be the best effective way to boost the energy potency than the standard models. The analysis on reversibility has shown larger impact to have monumental applications in rising technologies like Quantum Computing, QCA, Nanotechnology and Low Power VLSI. In this project, we have realized novel reversible design of Linear Feedback Shift Register (LFSR) and Parallel Signature Analyzer (PSA) and have explored these in terms of delay, quantum cost and garbage. Whereas approaching for LFSR, we tend to have shown new reversible realization of Serial Input Serial Output (SISO) and Serial Input Parallel Output (SIPO) registers up to N-bit and analyzed their delay, quantum price & garbage in terms of some lemmas, which will outperform the existing styles accessible in literature.

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