Toggle-Aware Compression for GPUs


Memory bandwidth compression will be an effective approach to realize higher system performance and energy potency in trendy information-intensive applications by exploiting redundancy in data. Previous works studied various knowledge compression techniques to boost each capability (e.g., of caches and main memory) and bandwidth utilization (e.g., of the on-chip and off-chip interconnects). These works addressed two common shortcomings of compression: (i) compression/decompression overhead in terms of latency, energy, and area, and (ii) hardware complexity to support variable knowledge size. In this paper, we tend to create the new observation that there's another necessary downside connected to knowledge compression within the context of the Communication energy efficiency: transferring compressed information leads to a substantial increase in the amount of bit toggles (Communication channel switchings from 0 to one or from one to zero). This, in flip, will increase the dynamic energy consumed by on-chip and off-chip buses thanks to more frequent charging and discharging of the wires. Our results, as an example, show that the bit toggle count increases by a median of two.a pair of× with some compression algorithms across 54 mobile GPU applications. We characterize and demonstrate this new problem across a big variety of 221 GPU applications and six different compression algorithms. To mitigate the problem, we propose 2 new toggle-aware compression techniques: energy management and Metadata Consolidation. These techniques greatly reduce the bit toggle count impact of the six knowledge compression algorithms we examine, while keeping most of their bandwidth reduction benefits.

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