Comparison of Preemption Schemes for Partially Reconfigurable FPGAs


Preemption techniques for hardware (HW) tasks are studied in order to boost system responsiveness at the task level and improve utilization of the FPGA space. This letter presents a fair comparison of existing state-of-the-art preemption approaches from the point of view of their capabilities and limitations plus impact on static and dynamic properties of the task. In comparison, we use a collection of cryptographic, image, and audio processing HW tasks and perform tests on a standard platform based mostly on a Virtex-four FPGA from Xilinx. Furthermore, we tend to propose the preemption as a methodology that will effectively increase FPGA utilization in case of HW tasks used as CPU accelerators in systems with memory protection and virtualization.

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