High Gamma Value 3D-Stackable HK/MG-Stacked Tri-Gate Nanowire Poly-Si FETs With Embedded Source/Drain and Back Gate Using Low Thermal Budget Green Nanosecond Laser Crystallization Technology PROJECT TITLE :High Gamma Value 3D-Stackable HK/MG-Stacked Tri-Gate Nanowire Poly-Si FETs With Embedded Source/Drain and Back Gate Using Low Thermal Budget Green Nanosecond Laser Crystallization TechnologyABSTRACT:3-dimensional sequentially stackable high- $k$ /metal-gate-stacked tri-gate nanowire poly-Si FETs with embedded supply/drain (e-S/D) and back gate were demonstrated. The highly crystallized channel, fabricated by inexperienced nanosecond laser crystallization, chemical mechanical polish, and postsurface modification processes, enhances the electrical property of the tri-gate nanowire FET. The e-S/D structure reduces the contact and series resistances caused by the nanowire structure. Thus, the fabricated n/p-kind tri-gate nanowire poly-Si FETs exhibit steep subthreshold swings (96/125 mV/decade), high ON-currents (232/110 $mu textA/mu textm$ ), and $I_mathrmscriptscriptstyle on/I_mathrmscriptscriptstyle OFF$ ratio ( $> 10^5)$ . Furthermore, the freelance back gate with skinny back gate oxide can easily adjust the edge voltage of the tri-gate nanowire transistor and leads to high gamma value (>zero.05) FET realizing sequentially stacked and low $V_mathrm dd$ (0.vi V) operable inverter. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest FinFETs With a Deep Buried Channel to Reduce the Readout Noise in CMOS Image Sensors Nitrogen-Doped Amorphous InZnSnO Thin Film Transistors With a Tandem Structure for High-Mobility and Reliable Operations
