Exploiting Refresh Effect of DRAM Read Operations: A Practical Approach to Low-Power Refresh


Dynamic random access memory (DRAM) needs periodic refresh operations to retain its information. In apply, DRAM retention times are normally distributed from 64 ms to many seconds. However, the traditional refresh methodology uses 64 ms as the refresh interval, since it applies the same refresh interval to any or all DRAM rows. So, the traditional refresh method leads to unnecessary refresh operations (eventually, energy waste) to the DRAM rows whose retention times are longer than sixty four ms. During this paper, we propose a practical refresh theme that exploits refresh impact of DRAM scan operations to cut back refresh overhead. Our proposed theme applies a refresh interval longer than the conventional refresh interval (sixty four ms) to the DRAM chip. In this case, weak DRAM rows (DRAM rows whose retention times are shorter than the refresh interval of the DRAM chip) cannot retain their knowledge. In order to retain the data stored within the weak DRAM rows, the memory controller problems read operations to the weak DRAM rows each needed refresh interval for the weak DRAM rows. Our evaluation results show that our proposed scheme with 192 ms refresh interval reduces average refresh energy consumption up to p.c, which in turn reduces average DRAM energy consumption up to 31.eight %, compared to the traditional refresh methodology (sixty four ms). Our proposed scheme needs no modification to internal DRAM chip structures, but it solely adds a small weak row buffer (the buffer for the weak row info) to the memory controller, that includes a negligible space overhead.

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