PROJECT TITLE :

Leveraging Hotspots and Improving Chip Reliability via Carbon Nanotube Grid Thermal Structure

ABSTRACT:

The increasing power consumption of integrated circuits (ICs) enabled by technology scaling requires additional efficient heat dissipation solutions to boost overall chip reliability and cut back hotspots. Rapidly growing 3-D IC technology strengthens the necessity with additional devices stacked per unit area. Thermal interface material (TIM) and MicroChannel are widely adopted ways to resolve the heat dissipation downside. In recent years, carbon nanotubes (CNTs) are proposed as a promising TIM due to their superior thermal conductivity. Several CNT-primarily based thermal structures for improving chip heat dissipation have been proposed and demonstrated important temperature reduction. During this project, we developed an improved CNT TIM structure which includes a CNT grid and thermal vias. It collaborates with MicroChannel to dissipate heat a lot of efficiently in 3-D chips and at the identical time, acquire more uniform chip thermal profiles. We gift simulation-based mostly experimental results that indicate up to 19.eighty eight% peak temperature reduction, seven.81% average temperature reduction, over sixty six% most temperature difference reduction on chip and 17.26% improvement in chip reliability for IBM-PLACE two.0 circuit benchmarks, showing the effectiveness of our proposed thermal structure for resolving thermal challenge and improving chip reliability in three-D IC.