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Prolonged 500 °C Demonstration of 4H-SiC JFET ICs With Two-Level Interconnect

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PROJECT TITLE :

Prolonged 500 °C Demonstration of 4H-SiC JFET ICs With Two-Level Interconnect

ABSTRACT:

This letter reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve larger than one thousand h of stable electrical operation at five hundred °C in air ambient. These ICs are based on 4H-SiC junction field-effect transistor technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over $sim 1$ - $mu textm$ scale vertical topology. Following initial burn-in, vital circuit parameters remain stable at intervals fifteen% for more than one thousand h of 500 °C operational testing. These results advance the technology foundation for realizing long-term sturdy 500 °C ICs with increased practical capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-setting applications.


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Prolonged 500 °C Demonstration of 4H-SiC JFET ICs With Two-Level Interconnect - 4.6 out of 5 based on 54 votes

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