Data Remapping for Static NUCA in Degradable Chip Multiprocessors


In chip multiprocessors (CMPs), nonuniform cache architecture (NUCA) is usually employed to prepare last-level cache (LLC) banks through network-on-chip (NoC). As a result of of the shrinking feature size and unstable operating environment, severe reliability problems unavoidably emerge and cause frequent on-chip component (e.g., cores, cache banks, routers) failures. Typical fault-tolerant CMPs ought to possess the feature of sleek degradation and operate normally with deactivated tiles. However, for CMPs adopting static NUCA, sure physical address areas will become inaccessible when cache banks in a very CMP node are isolated from the system. To safeguard cache from such threats induced by either on-line or offline faults, we tend to survey many potential solutions and propose the utility-driven node remapping technique by reusing the resources in NoC. In our NoC-assisted remapping theme, cache accesses to isolated banks are therefore redirected that cache space contention are successfully balanced and relieved in shared-LLC, thus guaranteeing the smallest amount performance penalty caused by fault isolation. Our experimental results show significant performance improvement over standard resizing approaches like set reduction.

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