An Energy-Efficient Nonvolatile In-Memory Computing Architecture for Extreme Learning Machine by Domain-Wall Nanowire Devices

PROJECT TITLE :

An Energy-Efficient Nonvolatile In-Memory Computing Architecture for Extreme Learning Machine by Domain-Wall Nanowire Devices

ABSTRACT:

The data-oriented applications have introduced increased demands on memory capacity and bandwidth, that raises the necessity to rethink the architecture of the present computing platforms. The logic-in-memory design is extremely promising as future logic-memory integration paradigm for prime throughput information-driven applications. From memory technology aspect, together recently introduced nonvolatile memory device, domain-wall nanowire (or race-track) not only shows potential as future power efficient memory, but also computing capacity by its distinctive physics of spintronics. This paper explores a unique distributed in-memory computing architecture where most logic functions are executed within the memory, which significantly alleviates the bandwidth congestion issue and improves the energy potency. The proposed distributed in-memory computing design is solely designed by domain-wall nanowire, i.e., each memory and logic are implemented by domain-wall nanowire devices. As a case study, neural network-based image resolution enhancement algorithm, referred to as DW-NN, is examined within the proposed architecture. We show that each one operations concerned in Machine Learning on neural network can be mapped to a logic-in-memory design by nonvolatile domain-wall nanowire. Domain-wall nanowire-based mostly logic is customized for in Machine Learning at intervals image data storage. As such, both neural network coaching and processing will be performed regionally at intervals the memory. The experimental results show that the domain-wall memory can cut back ninety two% leakage power and sixteen% dynamic power compared to main memory implemented by DRAM; and domain-wall logic will reduce 31% both dynamic and 65% leakage power below the similar performance compared to CMOS transistor-primarily based logic. And system throughput in DW-NN is improved by eleven.6x and therefore the energy potency is improved by 56x when put next to conventional Image Processing system.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here