Low-Input Power-Level CMOS RF Energy-Harvesting Front End

PROJECT TITLE :

Low-Input Power-Level CMOS RF Energy-Harvesting Front End

ABSTRACT:

RF energy-harvesting front ends consist of matching networks and RF rectifiers. The minimum detectable power (sensitivity) depends on the losses of both parts. In this paper, RF energy-harvesting sensitivity limits at steady state and style tradeoffs for matching networks and rectifiers are introduced. These limits and tradeoffs are examined for normal CMOS 0.18- m technology. 2 designs, one with off-chip matching network and the opposite with on-chip matching network, are presented, compared, and measured for an output voltage of one V. The sensitivity of the off-chip design is dBm whereas taking a hundred and eighty ninety m die area and off-chip prime quality inductor and capacitor, which takes an further seven.28 mm printed circuit board space. The fully integrated on-chip design contains a sensitivity of dBm while taking 820 450 m die area. The sensitivity of the former proved superior whereas the latter is additional enticing in terms of compactness, low value, and easier tunability.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here