PROJECT TITLE :

LogCA: A Performance Model for Hardware Accelerators

ABSTRACT:

To address the Dark Silicon downside, architects have increasingly turned to special-purpose hardware accelerators to boost the performance and energy potency of common computational kernels, such as encryption and compression. Unfortunately, the latency and overhead required to off-load a computation to an accelerator sometimes outweighs the potential advantages, ensuing in a very internet decrease in performance or energy efficiency. To assist architects and programmers reason about these trade-offs, we have developed the LogCA model, a straightforward performance model for hardware accelerators. LogCA provides a simplified abstraction of a hardware accelerator characterized by 5 key parameters. We have a tendency to have validated the model against a selection of accelerators, ranging from on-chip cryptographic accelerators in Sun's UltraSparc T2 and Intel's Sandy Bridge to each discrete and integrated GPUs.