PROJECT TITLE :
Impact of Aging Phenomena on Latches’ Robustness
During this paper, we tend to analyze the consequences of aging mechanisms on the soft error susceptibility of each commonplace and sturdy latches. Significantly, we have a tendency to think about bias temperature instability (BTI) affecting both nMOS (positive BTI) and pMOS (negative BTI), that is taken into account the foremost critical aging mechanism threatening the reliability of ICs. Our analyses show that as an IC ages, BTI significantly will increase the susceptibility of both normal latches and low-cost sturdy latches, whose robustness relies on the increase within the essential charge of their most susceptible node(s). Instead, we can show that BTI minimally affects the soft error susceptibility of additional expensive sturdy latches that avoid the generation of soft errors by style. Consequently, our analysis highlights the fact that in applications mandating the utilization of low-value robust latches, designers will must face the problem of their robustness degradation during IC lifetime. So, for these applications, designers will have to develop correct low-price solutions to ensure the minimal required level of robustness during the entire IC lifetime.
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