Improving security in cache memory by power efficient scrambling technique PROJECT TITLE :Improving security in cache memory by power efficient scrambling techniqueABSTRACT:The last decade has recorded an increase in security protocols for integrated circuits and memory systems, as a result of of device specific attacks like side-channel monitoring and cold boot and conjointly as a result of sensitive info is stored in such devices. The scope of this study is to propose new security measures which will be applied in memory systems, so as to create the stored data unusable, if retrieved successfully by any sort of attack. The security technique uses interleaved scrambling vectors to scramble the data retained in an exceedingly memory system and employs many dissemination rules. The proposed technique is investigated and assessed from several perspectives, like power consumption, time performance and area overhead. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest Highly hydrophobic and partially conductive polydimethylsiloxane surface produced by direct fluorination and subsequent annealing Asymptotically Exact Approximations for the Symmetric Difference of Generalized Marcum $Q$-Functions
