PROJECT TITLE :

An SVPWM Scheme for the Suppression of Zero-Sequence Current in a Four-Level Open-End Winding Induction Motor Drive With NestedRectifier–Inverter

ABSTRACT:

A four-level open-end winding induction motor (OEWIM) drive is known to suffer from 2 perennial issues. One is the problem of zero-sequence currentin the motor phases, that is caused by the existence of zero-sequence voltage in them. The opposite is the overcharging of the dc-link capacitor of theinverter operated with lower dc-link voltage by its counterpart operated with the next dc-link voltage. This paper investigates the applicability of aspecial variant of house vector pulse width modulation (SVPWM) scheme for a recently proposed power circuit configuration, in which arectifier–inverter combination is nested inside the conventional 2-level inverter configuration to achieve four-level inversion. This PWM schemeis named as the sample-averaged zero-sequence elimination (SAZE) SVPWM scheme, wherein the zero sequence voltage is suppressed in every sampling timeperiod in the typical sense. Both of the aforementioned issues encountered during this drive are successfully overcome for this power circuit configurationby resorting to the proposed SVPWM strategy.