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PROJECT TITLE :

Understanding the Relation Between the Performance and Reliability of NAND Flash/SCM Hybrid Solid-State Drive - 2016

ABSTRACT:

A NAND flash memory/storage-class memory (SCM) hybrid solid-state drive (SSD) will achieve higher performance than the standard NAND flash-solely SSD. Error-correcting codes (ECCs) are applied to the SSD to correct bit errors occurring within the NAND flash and SCM. To correct additional bit errors, the stronger ECC is required and the ECC latency will increase. This paper evaluates the relation between the performance and also the reliability of the NAND flash/SCM hybrid SSD. 1st, how the ECC latency impacts the SSD performance is analyzed. Then, the SSD performances are evaluated with various knowledge-access patterns. The ECC effect is considerably completely different among the information-access patterns. Moreover, four situations of the SCM reliability are established and the performances are evaluated with the four data-access patterns. When the SCM reliability becomes high, the decrease in the throughput due to the ECC for SCM becomes significantly small. Finally, by setting the suitable SSD performance, the acceptable bit-error rate (BER) of the SCM is evaluated. The SCM BER can be as high as around 0.9p.c.


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Error Statistics Flash Memories Error Correction Codes Reliability Nand Circuits Storage-Class Memory (SCM) Error-Correcting Code (ECC) Nand Flash Memory Performance Solid-State Drive (SSD)
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