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  3. IEEE MTECH VLSI ( VHDL/VERILOG ) PROJECTS
  4. Digtial to time converter using SET - 2015
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Category: MTECH VLSI ( VHDL/VERILOG ) PROJECTS
By MTech Projects
MTech Projects
27.Mar
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Digtial to time converter using SET - 2015

PROJECT TITLE:

Digtial to time converter using SET - 2015

ABSTRACT:

This project presents a mix of 2 very necessary techniques so as to scale back power consumption and area. Recently a terribly useful method has been presented for changing digital to time in 65nm CMOS. Since Single-Electronic technology has been managed to be a unique nanoelectronic answer to scale back power consumption and space, even smaller than recent efforts in CMOS technology, we tend to determined to simulate the recommended DTC using Single-Electron-Transistor. We tend to additionally modified the urged circuit a very little bit.

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