PROJECT TITLE :
A High-Throughput Architecture of List Successive Cancellation Polar Codes Decoder With Large List Size - 2018
As the first kind of forward error correction (FEC) codes that achieve channel capacity, polar codes have attracted a lot of analysis interest recently. Compared with other standard FEC codes, polar codes decoded by list successive cancellation decoding (LSCD) with a giant list size have higher error correction performance. But, because of the serial decoding nature of LSCD and therefore the high complexity of list management (LM), the decoding latency is high, which limits the usage of polar codes in sensible applications that need low latency and high throughput. In this work, we study the high-throughput implementation of LSCD with a giant list size. Specifically, at the algorithmic level, to attain an occasional decoding latency with moderate hardware complexity, 2 decoding schemes, a multi-bit double thresholding theme and a partial G-node look-ahead scheme, are proposed. Then, a high-throughput VLSI design implementing the proposed algorithms is developed with optimizations on totally different computation modules. From the implementation results on UMC ninety nm CMOS technology, the proposed design achieves decoding throughputs of one.103 Gbps, 97seven Mbps and 827 Mbps when the list sizes are eight, 16 and 32, respectively.
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