PROJECT TITLE :

Real-Time Simulation of Passage-of-Time Encoding in Cerebellum Using a Scalable FPGA-Based System

ABSTRACT:

The cerebellum plays a crucial role for sensorimotor management and learning. But, dysmetria or delays in movements' onsets consequent to damages in cerebellum can't be cured utterly at the moment. Neuroprosthesis is an rising technology which will doubtless substitute such motor management module in the brain. A pre-requisite for this to become sensible is the capability to simulate the cerebellum model in real-time, with low timing distortion for correct interfacing with the biological system. During this paper, we have a tendency to present a frame-based network-on-chip (NoC) hardware design for implementing a bio-realistic cerebellum model with ~ 100 000 neurons, that has been used for finding out timing management or passage-of-time (POT) encoding mediated by the cerebellum. The simulation results verify that our implementation reproduces the POT illustration by the cerebellum properly. Furthermore, our field-programmable gate array (FPGA)-based mostly system demonstrates glorious computational speed that it can complete 1sec planet activities at intervals twenty five.half-dozen ms. It is also highly scalable such that it can maintain approximately the identical computational speed whether or not the neuron range will increase by one order of magnitude. Our style is shown to outperform 3 various approaches previously used for implementing spiking neural network model. Finally, we show a hardware electronic setup and illustrate how the silicon cerebellum can be adapted as a possible neuroprosthetic platform for future biological or clinical application.