A computation and energy reduction technique for HEVC intra mode decision PROJECT TITLE :A computation and energy reduction technique for HEVC intra mode decisionABSTRACT:High Efficiency Video Coding (HEVC) intra mode decision algorithm has very high computational complexity. Therefore, in this paper, a computation and energy reduction technique is proposed for reducing the amount of computations performed by Sum of Absolute Transformed Difference (SATD) calculations in HEVC intra mode decision, and therefore reducing the energy consumption of HEVC SATD calculation hardware without any PSNR loss and bit rate increase. The proposed technique reduced the energy consumption of HEVC SATD calculation hardware up to 64.6%. Therefore, it can be used in portable consumer electronics products that require a real-time HEVC encoder. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest Automatic generation control of multi-unit multi-area deregulated power system using a novel quasi-oppositional harmony search algorithm Bi-predictive motion estimation for HEVC on a graphics processing unit (GPU)
