Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors


Integrating multiple power converters on-chip improves energy potency of manycore architectures. Switched-capacitor (SC) dc-dc converters are compatible with conventional CMOS processes, however ancient implementations suffer from restricted conversion potency. We propose a dynamic voltage and frequency scaling theme with SC converters that achieves high converter efficiency by permitting the output voltage to ripple and having the processor core frequency track the ripple. Minimum core energy is achieved by hopping between different converter modes and tuning body-bias voltages. A multicore processor model based mostly on a 28-nm technology shows conversion efficiencies of ninety% together with over twenty five% improvement in the overall chip energy potency.

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