Multiplying Circuits

No	Project Titles	Abstract
1 .	Efficient implementation of bit-parallel fault tolerant polynomial basis multiplication and squaring over GF(2m) - 2016	Abstract
2 .	A Modified Partial Product Generator for Redundant Binary Multipliers - 2016	Abstract
3 .	Pre-Encoded Multipliers Based on Non-Redundant Radix-4 Signed-Digit Encoding - 2016	Abstract
4 .	Floating-Point Butterfly Architecture Based on Binary SignedDigit Representation - 2016	Abstract
5 .	Design and Implementation of Area-Efficient and Low-Power Configurable Booth-Multiplier - 2016	Abstract
6 .	Low-Cost High-Performance VLSI Architecture forMontgomery Modular Multiplication - 2016	Abstract
7 .	High speed hybrid double multiplication architectures using new serial out bit level mastrovito multiplier - 2016	Abstract
8 .	Hardware and Energy-Efficient Stochastic LU Decomposition Scheme for MIMO Receivers - 2016	Abstract

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