Hardware Description Languages

No	Project Titles	Abstract
1 .	Efficient Implementation of Scan Register Insertion on Integer Arithmetic Cores for FPGAs - 2016	Abstract
2 .	Low complexity and area efficient reconfigurable multimode inter leaver address generator for multi standard radios - 2016	Abstract
3 .	High Performance Reconfigurable Viterbi Decoder Design for Multi-Standard Receiver - 2016	Abstract

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