PROJECT TITLE :

Selective gray-coded bit-plane based low-complexity motion estimation and its hardware architecture

ABSTRACT:

Nowadays, many shopper electronics devices have video capturing capability which is one among the foremost time, power and memory consuming application. Motion estimation (ME) is that the key half of the video coding method in terms of computational load. Therefore, it is vital to implement this process in a resource economical way while not degrading the encoding quality and real-time operation performance. Low bitdepth representation primarily based ME strategies draw a ton of attention in consumer electronics space mainly thanks to its highly efficient hardware and software implementations. However, these low bit-depth illustration based mostly ways typically assume that the low bit-depth pictures are already offered. Furthermore, these methods simply neglect the binarization cost which isn't a correct approach when whole encoding architecture is of concern. This paper presents a unique selective Gray-coding based ME methodology and its hardware architecture with an embedded system integration by creating use of one of the foremost common interconnect architecture in client electronics devices. Experimental results show that it is attainable to reduce computational load of binarization stage significantly whereas improving the ME accuracy by the proposed approach compared to strategies at the same category.