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  4. Realization of 2:4 reversible decoder and its applications
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Category: MTech VLSI Projects
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MTech Projects
01.Jun
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Realization of 2:4 reversible decoder and its applications

PROJECT TITLE :

Realization of 2:4 reversible decoder and its applications (2014)

ABSTRACT :

In this paper realization of 2:4 reversible decoder is proposed which can provide active high as well as active low outputs. The proposed decoder uses Feynman and Fredkin gates and has low quantum cost The proposed gate is fist extended to 3:8 decoder followed by an n-input decoder. The theoretical proposition is verified through SPICE simulations. A comparison with existing reversible decoders is also included.

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Previous article: parallel multiplier accumulator Based on radix-2 Modified Booth Algorithm by using a VLSI architecture parallel multiplier accumulator Based on radix-2 Modified Booth Algorithm by using a VLSI architecture Next article: All Optical Reversible Multiplexer Design using Mach-Zehnder interferometer All Optical Reversible Multiplexer Design using Mach-Zehnder interferometer
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