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  4. Multifunction Residue Architectures for Cryptography
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Category: MTech VLSI Projects
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MTech Projects
01.Jun
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Multifunction Residue Architectures for Cryptography

PROJECT TITLE :

Multifunction Residue Architectures for Cryptography (2014)

ABSTRACT :

A design methodology for incorporating Residue Number System (RNS) and Polynomial Residue Number System (PRNS) in Montgomery modular multiplication in GF(p) or GF(2n) respectively, as well as a VLSI architecture of a dual-field residue arithmetic Montgomery multiplier are presented in this paper. An analysis of input/output conversions to/from residue representation, along with the proposed residue Montgomery multiplication algorithm, reveals common multiply-accumulate data paths both between the converters and between the two residue representations. A versatile architecture is derived that supports all operations of Montgomery multiplication in GF(p) and GF(2n), input/output conversions, Mixed Radix Conversion (MRC) for integers and polynomials, dual-field modular exponentiation and inversion in the same hardware. Detailed comparisons with state-of-the-art implementations prove the potential of residue arithmetic exploitation in dual-field modular multiplication.

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Previous article: A parallel radix-sort-based VLSI architecture for finding the first W maximum/minimum values A parallel radix-sort-based VLSI architecture for finding the first W maximum/minimum values Next article: Area-Delay-Power Efficient Fixed-Point LMS Adaptive Filter With Low Adaptation-Delay Area-Delay-Power Efficient Fixed-Point LMS Adaptive Filter With Low Adaptation-Delay
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