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  4. Knowledge-Based Neural Network Model for FPGA Logical Architecture Development - 2016
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Category: MTech VLSI Projects
By MTech Projects
MTech Projects
01.Jun
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Knowledge-Based Neural Network Model for FPGA Logical Architecture Development - 2016

PROJECT TITLE :

Knowledge-Based Neural Network Model for FPGA Logical Architecture Development - 2016

ABSTRACT:

This paper proposes a knowledge-based mostly neural network (KBNN) modeling approach for field-programmable gate array (FPGA) logical design design. The KBNN embeds the prevailing FPGA analytical models (AMs) into an NN. The NN will complement the AMs per their needs to supply more increased model accuracy, while maintaining the meaningful trends successfully captured within the AMs. The obtained KBNN predicts the routing channel width required by circuit implementations on various FPGA architectures, which can be employed by architects to quickly and accurately evaluate numerous FPGA architectures in early development stages. Experimental results show that the KBNN-based approach achieves a median error of twop.c, that shows seventy five% accuracy enhancement over the prevailing AMs for routing channel width estimation of a set of benchmark circuits and FPGA architectures. The KBNN model has been applied to 3 FPGA design development scenarios to demonstrate its sensible application and effectiveness.

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  • ROOT
  • Neural Nets
  • Field-Programmable Gate Array (FPGA) Architecture Design
  • Knowledge-Based Neural Network (KBNN)
Previous article: A Performance Degradation Tolerable Cache Design by Exploiting Memory Hierarchies - 2016 A Performance Degradation Tolerable Cache Design by Exploiting Memory Hierarchies - 2016 Next article: A New Optimal Algorithm for Energy Saving in Embedded System With Multiple Sleep Modes - 2016 A New Optimal Algorithm for Energy Saving in Embedded System With Multiple Sleep Modes - 2016
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