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  4. Fault Tolerant Logic Cell FPGA - 2017
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Category: MTech VLSI Projects
By MTech Projects
MTech Projects
11.Oct
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Fault Tolerant Logic Cell FPGA - 2017

PROJECT TITLE :

Fault Tolerant Logic Cell FPGA - 2017

ABSTRACT:

It is proposed fault tolerant logic cell - LUT FPGA consistent with concept of the functionally complete tolerant element (FCT). The FCT component (logic element with the redundancy basis) retains functional completeness in case of faults. FCT element allows to perform FPGA self-repair once faults. It is established, that in an exceedingly variety of cases the quadrupling of the LUT's transistors has a lot of advantages than the tripling.

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  • Low Power Area-Efficient DCT Implementation Based on Markov Random Field-Stochastic Logic - 2018
  • Design and Implementation of Lossless DWT/IDWT for Medical Images
  • Error Resilient and Energy Efficient MRF Message-Passing-Based Stereo Matching - 2016
  • RAP-CLA: A Reconfigurable Approximate Carry Look-Ahead Adder - 2017
  • 10T SRAM Using Half-VDD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage - 2017
  • Design of AES (Advanced Encryption Standard) Encryption and Decryption Algorithm with 128-bits Key Length
  • Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication - 2015
  • A Methodology for Optimized Design of Secure Differential Logic Gates for DPA Resistant Circuits
  • Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product Array Height Reduction - 2017
  • Area-Efficient Architecture for Dual-Mode DoublePrecision Floating Point Division - 2017
Previous article: A band-selective low-noise amplifier using an improved tunable active inductor for 3–5 GHz UWB receivers - 2017 A band-selective low-noise amplifier using an improved tunable active inductor for 3–5 GHz UWB receivers - 2017 Next article: 10T SRAM Using Half-VDD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage - 2017 10T SRAM Using Half-VDD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage - 2017
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