PROJECT TITLE :

CWFP: Novel Collective Write back and Fill Policy for LastLevel DRAM Cache - 2016

ABSTRACT:

Stacked DRAM used as the last-level caches (LLCs) in multicore systems delivers performance enhancement thanks to its capability profit. Whereas the performance of LLC depends heavily upon its block replacement policy, the traditional replacement policy desires redesigning to take advantage of the simplest of DRAM cache and avoid its drawbacks. The prevailing DRAM cache insertion policy blindly forwards victim lines replaced from L3 to the off-chip memory, irrespective of the potential for increased hits by putting a fraction of them within the DRAM cache. Nevertheless, a nai¨ve style that steers all dirty victims to the DRAM cache introduces excessive writeback traffic, that aggravates capacity misses and DRAM interference. To leverage insertions in terms of writeback or fill requests, we have a tendency to propose a collective writeback and fill policy that adapts to the distinct access patterns of heterogeneous workloads based on runtime misses and writeback potency. The synthesis result shows that the new policy has solely a small hardware overhead. According to the experimental results on the gem5 simulator, the new policy will increase harmonic instruction per cycle throughput by eighteen%, 11.vi%, and 11.sevenp.c, respectively, compared with the Always Writeback (AW)-Always Fill policy, Never Writeback Adaptive DRAM Placement policy, and AW Adaptive DRAM Placement policy on 64-MB alloy cache, whereas the improvement is 19.3%, 13.7percent, and fourteen.fivepercent on 64-MB MissMap cache.