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  4. Algorithm and Architecture of Configurable Joint Detection and Decoding for MIMO Wireless Communications With Convolution Codes - 2016
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Category: MTech VLSI Projects
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MTech Projects
01.Jun
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Algorithm and Architecture of Configurable Joint Detection and Decoding for MIMO Wireless Communications With Convolution Codes - 2016

PROJECT TITLE :

Algorithm and Architecture of Configurable Joint Detection and Decoding for MIMO Wireless Communications With Convolution Codes - 2016

ABSTRACT:

This paper presents an algorithm and a VLSI design of a configurable joint detection and decoding (CJDD) theme for multi-input multioutput (MIMO) wireless communication systems with convolutional codes. A completely unique tree-enumeration strategy is proposed such that the MIMO detection and decoding of convolutional codes will be conducted in single stage employing a tree-searching engine. Moreover, this style can be configured to support completely different mixtures of quadrature amplitude modulation (QAM) schemes with encoder code rates, and so can be a lot of practically deployed to real-world MIMO wireless systems. A formal outline of the proposed algorithm can be given and simulation results for sixteen-QAM and sixty four-QAM with rate-1/2 and rate-1/three codes will be presented showing that, compared with the traditional separate scheme, the CJDD algorithm will greatly improve bit error rate (BER) performance with totally different system settings. In addition, the VLSI architecture and implementation of the CJDD approach will be illustrated. The architectures and circuits are designed to support configurability and suppleness whereas maintaining high potency and low complexity. The postlayout experimental results for 16-QAM and 64-QAM with rate-1/two and rate-1/3 codes show that, compared with the previous configurable design, this architecture will achieve reduced or comparable complexity with improved BER performance.

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  • ROOT
  • Joint Detection And Decoding (JDD)
  • Multi-Input Multioutput (MIMO) Detection
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