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  3. Embedded Systems Letters
  4. Table Size Reduction Methods for Faithfully Rounded Lookup-Table-Based Multiplierless Function Evaluation
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Category: Embedded Systems Letters
By MTech Projects
MTech Projects
15.May
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Table Size Reduction Methods for Faithfully Rounded Lookup-Table-Based Multiplierless Function Evaluation

PROJECT TITLE :

Table Size Reduction Methods for Faithfully Rounded Lookup-Table-Based Multiplierless Function Evaluation

ABSTRACT:

Table-lookup-and-addition strategies give multiplierless operate evaluation using multiple lookup tables and a multioperand adder. In spite of their high-speed operation, they're only practical in low-precision applications due to the quick increase in table size with precision width. In this brief, we tend to gift 2 methods for table size reduction by decomposing the first table of initial values into 2 or 3 tables with fewer entries and/or smaller bit width. The proposed table decompositions don't incur any further rounding errors therefore that the original table can be utterly recovered. Experimental results demonstrate vital saving of table sizes compared with the best of the previous designs of the multipartite ways.

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