PROJECT TITLE :

A computation and energy reduction technique for HEVC intra mode decision

ABSTRACT:

High Potency Video Coding (HEVC) intra mode decision algorithm has very high computational complexity. Therefore, in this paper, a computation and energy reduction technique is proposed for reducing the amount of computations performed by Add of Absolute Reworked Distinction (SATD) calculations in HEVC intra mode call, and thus reducing the energy consumption of HEVC SATD calculation hardware while not any PSNR loss and bit rate increase. The proposed technique reduced the energy consumption of HEVC SATD calculation hardware up to sixty four.sixp.c. So, it can be employed in moveable shopper electronics merchandise that need a real-time HEVC encoder.