PROJECT TITLE:

A Low-Power Architecture for the Designof a One-Dimensional Median Filter. - 2015

ABSTRACT:

This temporary presents a coffee-power design for the design of a one-dimension median filter. It is a word-level two-stage pipelined filter, receiving an input sample and generating a median output at every machine cycle. The ability consumption is reduced by decreasing the quantity of signal transitions in the circuit. This will be done by keeping the stored samples immobile within the window through the utilization of a token ring in our architecture. The experimental results have shown that, at the expense of some additional area cost, the power consumption can be successfully reduced.


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