Sell Your Projects | My Account | Careers | This email address is being protected from spambots. You need JavaScript enabled to view it. | Call: +91 9573777164

A CMOS PWM Transceiver Using Self-Referenced Edge Detection - 2015


A CMOS PWM Transceiver Using Self-Referenced Edge Detection - 2015


A CMOS pulsewidth modulation (PWM) transceiver circuit that exploits the self-referenced edge detection technique is presented. By comparing the rising edge that is self-delayed by about 0.five T and also the modulated falling edge in one carrier clock cycle, area-efficient and high-robustness (against timing fluctuations) edge detection enabling PWM communication is achieved without requiring elaborate part-locked loops. Since the proposed self-referenced edge detection circuit has the potential of timing error measurement whereas changing the length of self-delay element, adaptive knowledge-rate optimization and delay-line calibration are realized. The measured results with a 65-nm CMOS prototype demonstrate a 2-bit PWM communication, high data rate (three.two Gb/s), and high reliability (BER> 10-twelve) with little area occupation (540 µm2). For reliability improvement, error check and correction associated with intercycle edge detection is introduced and its effectiveness is verified by one-bit PWM measurement.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

Project EnquiryLatest Ready Available Academic Live Projects in affordable prices

Included complete project review wise documentation with project explanation videos and Much More...


+91 9573777164
9:30am - 7:30pm IST
[email protected]
[email protected]