PROJECT TITLE :
Knights Landing: Second-Generation Intel Xeon Phi Product
This article describes the architecture of Knights Landing, the second-generation Intel Xeon Phi product family, that targets high-performance computing and other highly parallel workloads. It provides a important increase in scalar and vector performance and a massive boost in memory bandwidth compared to the prior generation, referred to as Knights Corner. Knights Landing could be a self-booting, customary CPU that is utterly binary compatible with previous Intel Xeon processors and is capable of running all legacy workloads unmodified. Its innovations include a core optimized for power potency, a 512-bit vector instruction set, a memory architecture comprising two types of memory for top bandwidth and massive capability, a high-bandwidth on-die interconnect, and an integrated on-package network material. These features enable the Knights Landing processor to produce vital performance improvement for computationally intensive and bandwidth-bound workloads while still providing sensible performance on unoptimized legacy workloads, while not requiring any special way of programming alternative than the quality CPU programming model.
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