PROJECT TITLE :
Parallel Stimulus Generation Based on Model Checking for Coherence Protocol Verification
The complexity of the multicore communication protocols makes it an enormous effort to validate the corresponding register transfer level (RTL). To achieve the high coverage of simulation, this brief proposes a covalidation technique to generate the RTL testbench primarily based on the model-checking technique. An object-oriented event-mapping technique is proposed to remodel the sequential traces created by formal technique to parallel RTL stimulus. A case study on the modified, exclusive, shared and invalid protocol was performed and showed that the covalidation methodology could save significant effort to form RTL testbenches while maintaining high coverage.
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