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Optimized Silicon QPSK Modulator With 64-Gb/s Modulation Speed

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PROJECT TITLE :

Optimized Silicon QPSK Modulator With 64-Gb/s Modulation Speed

ABSTRACT:

We have a tendency to demonstrate a compact silicon quadrature phase-shift keying (QPSK) modulator consisting of two nested Mach–Zehnder interferometers with a size of 4.5- $rm mm^2$. The $rm V_Pi cdot rm L$ of the modulator is one.four $rm V cdot rm cm$ with an insertion loss of 8 dB. Further, sixty four-Gb/s QPSK modulation is achieved with miscalculation vector magnitude (EVM) of 24.fourp.c and bit error rate (BER) of 2.one $times$ $ten^-5$ at the received optical power of $-$ten dBm once the device and an EVM of thirty one.sevenpercent and BER of 8.four $times$ $ten^-4$ at the received optical power of 0 dBm when ten-km single-mode fiber transmission. The estimated power consumption is 7.one pJ/bit for the 64-Gb/s QPSK modulation.


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Optimized Silicon QPSK Modulator With 64-Gb/s Modulation Speed - 4.7 out of 5 based on 68 votes

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