PROJECT TITLE :
Column-Parallel Digital Correlated Multiple Sampling for Low-Noise CMOS Image Sensors
This paper presents a low-noise CMOS image sensor using column-parallel high-gain signal readout and digital correlated multiple sampling (CMS). The sensor used is a conventional 4T active pixel with a pinned-photodiode as detector. The test sensor has been fabricated in a 0.18 μm CMOS image sensor process from TSMC. The random noise from the pixel readout chain is reduced in two stages, first using a high gain column parallel amplifier and second by using the digital CMS technique. The dark random noise measurement results show that the proposed column-parallel circuits with digital CMS technique is able to achieve 127 μVrms input referred noise. The significant reduction in the sensor read noise enhances the sensor's signal-to-noise ratio (SNR) with 10.4 dB. Such sensors are very attractive for low-light imaging applications which demand high SNR values.
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