Sell Your Projects | My Account | Careers | This email address is being protected from spambots. You need JavaScript enabled to view it. | Call: +91 9573777164

Spacer Engineering-Based High-Performance Reconfigurable FET With Low OFF Current Characteristics

1 1 1 1 1 Rating 4.89 (37 Votes)

PROJECT TITLE :

Spacer Engineering-Based High-Performance Reconfigurable FET With Low OFF Current Characteristics

ABSTRACT:

In this letter, we have a tendency to optimize and investigate for the first time the result of supply/drain spacer oxide on the performance of a twin gate ambipolar silicon nanowire field result transistor. Using in depth three-D TCAD simulations, we have a tendency to show that the OFF-state leakage will be reduced by additional than 2 orders of magnitude attributable to the combined use of HfO2 spacer and high-κ gate dielectric, resulting in an enhanced ON/OFF current ratio >101one for both n and p-FET as compared with reported values of ~109. Comparing with the present experimental twin and trigate ambipolar devices, sixty four.onepercent improvement in subthreshold slope for n-FET and 61.eightpercent (40.9%) for n (p-FET) are observed. Having, an improvement in the ON-state current with JDmax of 767.51 (263.05) kA/cm-a pair of for n-FET (pFET), the device guarantees wonderful ultra low power logic performance, with ambipolarity.


Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here


Spacer Engineering-Based High-Performance Reconfigurable FET With Low OFF Current Characteristics - 4.9 out of 5 based on 37 votes

Project EnquiryLatest Ready Available Academic Live Projects in affordable prices

Included complete project review wise documentation with project explanation videos and Much More...