PCFTL: A Plane-Centric Flash Translation Layer Utilizing Copy-Back Operations


A software module named flash translation layer (FTL) running in the controller of a flash SSD exposes the linear flash memory to the system as a block storage device. The effectiveness of an FTL considerably impacts the performance and sturdiness of a flash SSD. During this research, we propose a replacement FTL known as PCFTL (Plane-Centric FTL), that fully exploits plane-level parallelism supported by fashionable flash SSDs. Its basic idea is to allocate updates onto the same plane where their associated original knowledge resides on thus that the write distribution among planes is balanced. Furthermore, it utilizes quick intra-plane copy-back operations to transfer valid pages of a victim block when a garbage assortment occurs. We largely extend a validated simulation atmosphere referred to as SSDsim to implement PCFTL. Comprehensive experiments using realistic enterprise-scale workloads are performed to evaluate its performance with respect to mean response time and sturdiness in terms of customary deviation of writes per plane. Experimental results demonstrate that compared with the well-known DFTL, PCFTL improves performance and durability by up to forty seven and eighty p.c, respectively. Compared with its earlier version (called DLOOP), PCFTL enhances sturdiness by up to 74 percent whereas delivering an identical I/O performance.

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