Embedded Transitive Closure Network for Runtime Deadlock Detection in Networks-on-Chip


Interconnection networks with adaptive routing are susceptible to deadlock, which could lead to performance degradation or system failure. Detecting deadlocks at runtime is challenging because of their highly distributed characteristics. In this paper, we present a deadlock detection method that utilizes runtime transitive closure (TC) computation to discover the existence of deadlock-equivalence sets, which imply loops of requests in networks-on-chip (NoCs). This detection scheme guarantees the discovery of all true deadlocks without false alarms in contrast with state-of-the-art approximation and heuristic approaches. A distributed TC-network architecture, which couples with the NoC infrastructure, is also presented to realize the detection mechanism efficiently. Detailed hardware realization architectures and schematics are also discussed. Our results based on a cycle-accurate simulator demonstrate the effectiveness of the proposed method. It drastically outperforms timing-based deadlock detection mechanisms by eliminating false detections and, thus, reducing energy wastage in retransmission for various traffic scenarios including real-world application. We found that timing-based methods may produce two orders of magnitude more deadlock alarms than the TC-network method. Moreover, the implementations presented in this paper demonstrate that the hardware overhead of TC-networks is insignificant.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

PROJECT TITLE :Code Compression for Embedded Systems Using Separated Dictionaries - 2017ABSTRACT:Engineers should think about performance, power consumption, and value when planning embedded digital systems; furthermore, memory
PROJECT TITLE : Code Compression for Embedded Systems Using Separated Dictionaries - 2016 ABSTRACT: Engineers should take into account performance, power consumption, and price when designing embedded digital systems; furthermore,
PROJECT TITLE : Enhanced Built-In Self-Repair Techniques for Improving Fabrication Yield and Reliability of Embedded Memories - 2016 ABSTRACT: Error correction code (ECC) and built-in self-repair (BISR) techniques by using
PROJECT TITLE : Write Buffer-Oriented Energy Reduction in the L1 Data Cache for Embedded Systems - 2016 ABSTRACT: In resource-constrained embedded systems, on-chip cache memories play an necessary role in both performance and
PROJECT TITLE : A New Optimal Algorithm for Energy Saving in Embedded System With Multiple Sleep Modes - 2016 ABSTRACT: For embedded systems with multiple sleep modes, it is attention-grabbing to understand how to maximise

Ready to Complete Your Academic MTech Project Work In Affordable Price ?

Project Enquiry