Zero-Sleep-Leakage Flip-Flop Circuit With Conditional-Storing Memristor Retention Latch


In this paper, two new zero-sleep-leakage flip-flop (F-F) circuits are proposed to make the sleep leakage literally zero. At the sleep-in time, the F-F's data are transferred to memristor retention latch; thus, the F-F can be completely cutoff from the external power supply saving the energy leak during the sleep time. The conditional storing circuit in the F-F (type-2) can reduce switching power by 87% in storing the data than the F-F (type-1). And, the crossover time of the F-F (type-2) is shortened by 97% than the F-F (type-1).

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PROJECT TITLE :Learning, Retention, and Slacking: A Model of the Dynamics of Recovery in Robot TherapyABSTRACT:Quantitative descriptions of the process of recovery of motor functions in impaired subjects during robot-assisted

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