PROJECT TITLE :
On-Chip Clocking of Nanomagnet Logic Lines and Gates
The nanomagnet logic (NML) devices considered here are variants of proposed components for the edge-driven, quantum-dot cellular automata device architecture, where the position of electrons on quantum dots was suggested as a mechanism for representing binary state. To control NML circuit components (e.g., gates and lines), to date, externally generated magnetic fields have served as a clock. The clock is used to make the magnets in a circuit ensemble transition to a metastable state, so fringing fields from individual devices can set the state of a neighboring device in accordance with a new input. However, such a clocking scheme is obviously not extensible to chip-level systems. For NML to be a viable candidate for digital systems, a mechanism for simultaneously modulating the energy barriers of a group of devices must be implemented “on-chip,” and guarantee unidirectional dataflow from circuit input to circuit output. We have experimentally demonstrated a CMOS-compatible clock, and used it to reevaluate all of the NML constructs required for a functionally complete logic set. All possible input combinations to said constructs were successfully considered. Experiments were designed to promote unidirectional dataflow.
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