PROJECT TITLE :

Active Memory Cube: A processing-in-memory architecture for exascale systems

ABSTRACT:

Several studies purpose to the problem of scaling existing computer architectures to fulfill the needs of an exascale system (i.e., capable of executing floating-purpose operations per second), consuming not more than 20 MW in power, by round the year 20twenty. This paper outlines a new design, the Active Memory Cube, which reduces the energy of computation considerably by performing computation in the memory module, rather than moving knowledge through massive memory hierarchies to the processor core. The architecture leverages a commercially demonstrated 3D memory stack known as the Hybrid Memory Cube, putting refined computational components on the logic layer below its stack of dynamic random-access memory (DRAM) dies. The paper also describes a lively Memory Cube tuned to the wants of a scientific exascale system. The computational components have a vector design and are capable of performing a comprehensive set of floating-purpose and integer instructions, predicated operations, and gather-scatter accesses across memory within the Cube. The paper outlines the software infrastructure used to develop applications and to guage the design, and describes results of experiments on application kernels, along with performance and power projections.


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