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VLSI ( VHDL and verilog projects )

1 1 1 1 1 Rating 4.87 (15 Votes)


1. Design and Implementation of convolution Verilog/VHDL

2. Design of 32-bit RISC Processor VHDL

3. Design and Implementation of Digital low power base band processor for RFID Tags Verilog

4. High Speed Parallel CRC Implementation Based On Unfolding, Pipelining and Retiming Verilog

5. High Performance Complex Number Multiplier Using Modified Booth Algorithm VHDL

6. Multiplication Acceleration Through Twin Precision VHDL

7. Design of an Open Core Protocol (OCP) IP Block VHDL

8. Design of 2D-Discrete Cosine Transformation Technique Verilog

9. Design of AES (Advanced Encryption Standard) Encryption Algorithm with 128-bits Key Length VHDL

10. Design of Dual Elevator Controller Verilog

11. Design of Lossless 2-D DWT (Discrete Wavelet Transform) using Lifting Scheme Architecture Verilog

12. Design of High Speed DDR SDRAM (Dual Data Rate Synchronously Dynamic RAM) Controller VHDL

13. Design of 16-bit QPSK (Quadrature Phase Shift Keying) Verilog

14. Design of Universal Asynchronous Receiver Transmitter (UART) VHDL

15. Design of an ATM (Automated Teller Machine) Controller Verilog

16. Design of an AMBA-Advanced High performance Bus (AHB) Protocol IP Block VHDL

17. Design of 16-QAM (Quadrature Amplitude Modulation) Modulator. Verilog

18. Design of Reversible Watermarking Algorithm using DWT Technique. Verilog

19. Design of Efficient Systolic Array Architecture for DWT (Discrete Wavelet Transform) Verilog

20. Design of Digital FM Receiver using PLL (Phase Locked Loop) VHDL

21. Design of Data Encryption Standard (DES) Verilog

22. Design of Distributed Arithmetic FIR Filter Verilog

23. Design of 1Kbyte Dual Port SRAM (Static Random Access Memory) Verilog

24. Design of Radix-2 Butterfly Processor to Prevent Overflow in the Arithmetic VHDL

25. Design of Triple Data Encryption Standard (TDES) Verilog

26. Design of 16 Point Radix-4 FFT (Fast Fourier Transform) Algorithm Verilog

27. Design of 8-Bit Pico Processor VHDL

28. Design of JPEG Image compression standard Verilog

29. Design of Floating-Point Multiplier using IEEE-754 Standard Verilog

30. Design of 8-bit Microcontroller VHDL

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VLSI ( VHDL and verilog projects ) - 4.9 out of 5 based on 15 votes

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