Distance-based large margin classifier suitable for integrated circuit implementation


A new learning method for classification issues that's suitable for integrated circuit implementation is presented. The method, that outperforms current approaches in many information sets, is predicated on a structural description of the learning set represented by a planar graph. The final classification operate consists of a hierarchical mixture of local consultants, that yields a large margin classifier for the full learning set. Since it is primarily based solely on distance calculations, on-chip learning can conjointly be executed. The tactic is also acceptable for on-line and incremental learning, since model parameters are obtained directly from the info set, without would like of user interaction for learning.

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